Semiconductors, or computer chips, are found in virtually every electrical product manufactured today. Chips are used not only in very sophisticated industrial and commercial electronic equipment, but also in many household and consumer items such as televisions, clothes washers and dryers, radios, and telephones. As products become smaller but more functional, there is a need to include more chips in the smaller products to perform the functionality. The reduction in size of cellular telephones is one example of how more and more capabilities are incorporated into smaller and smaller electronic products.
As electrical devices become increasingly miniaturized, technologies have combined integrated circuit (IC) manufacturing techniques with traditional electrical circuit components to form such components as capacitors, resistors, filters, and interconnects directly upon a silicon or silicon-like substrate. For example, most of the devices in today's portable wireless products are passive components, and the integration of passive components into a substrate or a separate device can provide significant performance, cost, and size advantages.
A typical such semiconductor device 10 having an integrated capacitor device is shown in FIG. 1. A process for fabricating device 10 is depicted in FIGS. 2A-2I. Device 10 includes a substrate 12 and a first conductive layer 14 disposed over the substrate (FIG. 2A). A high resistivity layer 16 is disposed over a portion of the substrate 12 and first conductive layer 14 as shown (FIG. 2B). A dielectric layer 18 is disposed over the high resistivity layers (FIG. 2C).
As a next step, a second conductive layer 22 is formed over the dielectric layer 18. A wire bond (WB) pad 20 is formed on the substrate (FIG. 2D). A first passivation layer 24 is formed as shown (FIG. 2E). A third and fourth conductive layer 26 and 28 are then disposed over the passivation layer 24 as shown (FIG. 2F). A second passivation layer 30 is then formed over the layers 26 and 28 (FIG. 2G). Fifth and sixth conductive layers 32 and 34 are formed (FIG. 2H). A solder bump 36 is then deposited on the layer 34 (FIG. 2I).
In the depicted process, the second conductive layer 22 is used as a top electrode of the capacitor device, which is patterned before the deposition of the first passivation layer 24. A wet etching process is used for patterning the layer 22. The wet etching process is generally not uniform, making critical dimension (CD) control a potentially serious manufacturing issue when patterning layer 22.
As a result, a lack of uniformity and potential over/under etching will effect the capacitance characteristics of the capacitor device, resulting in non-uniform specifications of the capacitor device. The center frequency of a filter having such a capacitor device is necessarily affected.